About

Dr Li Xiangwei is a Senior Frontend Engineer in NPU Design at Bitdeer, Singapore.

Before joining Bitdeer, he was a Senior Staff Engineer in the Architecture and System Design Group at Huawei Singapore Research Center (SRC), where he worked from August 2022 to July 2026. He led power, performance, and area (PPA) optimization for the Ascend AI Core through both novel microarchitectural improvement and full custom design of the MAC unit. His expertise includes AI accelerator architecture, digital front-end design, reconfigurable computing, and systolic-array-based accelerators for matrix and vector computations. He has extensive experience in designing high-performance hardware architectures that deliver state-of-the-art power, performance, and area efficiency. Prio to that, he was a Senior Design Engineer at Avnet Asia in Singapore from July 2021 to August 2022. His major work covers cutting edge AI applications such as object detection on Xilinx Kria SoM such as KV260, FPGA-based machine learning radio frequency system on Xilinx Gen3 RFSoC such as ZCU216, and advanced driver-assistance systems (ADAS) on Xilinx MPSoC such as ZCU104.

From September 2020 to July 2021, he worked as a Research Fellow at School of Computer Science and Engineering, Nanyang Technological University, under the supervision of Associate Professor Douglas Maskell. This is a further collaboration with Professor Philip H.W. Leong’s Computer Engineering Lab, whereas Dr Li was a Postdoctoral Research Associate at School of Electrical and Information Engineering, The University of Sydney, for the duration of July 2019 to July 2020. From December 2018 to July 2019, he worked as a Research Scientist at Institute of High Performance Computing, A*STAR. His major work was to design and implement efficient parallel architectures for low precision deep neural networks (DNNs) and streaming fashion applications such as automatic modulation classification (AMC) and object detection. He has solid hands-on experience of system level FPGA design and machine learning libraries such as TensorFlow, PyTorch and Vitis-AI.

Earlier than that, he got the Ph.D. degree in 2018 from the School of Computer Science and Engineering, Nanyang Technological University, under the supervision of Associate Professor Douglas Maskell. His research was mainly focusing on reconfigurable computing, specifically proposing time-multiplexed FPGA overlay to improve design productivity of FPGAs.

Prior to the Ph.D., he obtained the M.Sc. in Electrical and Electronic Engineering from The University of Hong Kong with Credit in 2014, and the B.Eng. in Communication Engineering from Shanghai University with Honors in 2011.